1. Field of the Invention
The present invention relates to a printed circuit unit based on an organic transistor.
2. Description of Related Art
As science and technology advance, many information equipments, such as radio frequency identification (RFID) tags, are being developed and are available on the market, which brings great convenience to human beings. RFID tags can be used in shopping malls, logistics industry, and traffic transportation. However, processing of the conventional inorganic chips for such products is complicated and expensive, and therefore a trade off between convenience and cost is hard to realize when considering the demand for low cost and mass production.
Accordingly, organic material related processing technologies that are relatively simple are currently continuously developed and proposed in order to achieve better convenience, circuit stable and lower production cost by directly printing logical circuits onto films regardless occupation of circuit area.
FIG. 1 illustrates a threshold voltage distribution range of a conventional printed organic transistor. Referring to FIG. 1, the threshold voltage of the printed organic transistor is likely to be affected by processing factors thereof to drift. It is to be noted that the threshold voltage drifts in a very large range, which distribution can be simulated like a Gaussian curve.
FIG. 2 is schematic diagram illustrating a circuit of a conventional printed inverter based on an organic transistor. Referring to FIG. 2, the printed inverter based on organic transistor includes a gain stage circuit 202 and a level shifter circuit 204. The gain stage circuit 202 includes organic transistors 211 and 213. The organic transistor 211 has a first source/drain, a second source/drain and a gate. The gate of the organic transistor 211 receives an input signal Vin, and the first source/drain is connected to a power source voltage Vdd. The organic transistor 213 has a first source/drain, a second source/drain and a gate. The first source/drain and the gate of the organic transistor 213 are both connected to a ground voltage. The level shifter circuit 204 includes an organic transistor 215 and an organic transistor 217. The organic transistor 215 includes a first source/drain, a second source/drain, and a gate. The gate of the organic transistor 215 is connected to the ground voltage, and the first source/drain of the organic transistor 215 is connected to the power source voltage Vdd. The organic transistor 217 includes a first source/drain, a second source/drain, and a gate. The first source/drain of the organic transistor 217 is connected to the second source/drain of the organic transistor 215, while the second source/drain and the gate of the organic transistor 217 are connected to the ground voltage and the second source/drain of the organic transistor 211, respectively.
FIG. 3 is a schematic diagram illustrating output signals of a conventional three stage serially cascaded printed inverter. Referring to FIG. 3, under a condition that a standard deviation is 2, the yield of the three-stage serially cascaded printed circuit unit is 94.5%, wherein a larger standard deviation means a larger drifting value of the threshold voltage of the organic transistor. FIG. 3 shows a lower output voltage distribution when the logical output is a low level and a higher output voltage distribution when the logical output is a high level.
Additionally, Kane M. G et al. proposed employing differential circuits for inverters (“Analog and digital circuits using organic thin-film transistors on polyester substrates”, IEEE Electron Device Letters, Vol. 21, Issue 11, pp. 534-536, November 2000). In this design the differential circuits generally more stable than single-ended circuits.
FIG. 4 is a schematic diagram illustrating output signals of a conventional three stage differential circuit serially cascaded printed inverter. Referring to FIG. 4, under a condition that a standard deviation is 2, the yield of the three-stage serially cascaded printed inverter by differential circuits is 97.3%. The yield of the serially cascaded three-stage printed inverters by differential circuits is improved to some degree compared to the conventional.